PDF) A 1.5-GS/s Flash ADC With 57.7-dB SFDR and 6.4-Bit ENOB in 90 nm Digital CMOS | Jorge Pernillo - Academia.edu
PDF] A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators | Semantic Scholar
ADC Effective Number of Bits - Developer Help
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ENOB calculation for ADCs with input-correlated quantization error using a sine-wave test
ADC
Figure 2 from A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators | Semantic Scholar
PDF] ENOB calculation for ADCs with input-correlated quantization error using a sine-wave test | Semantic Scholar
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Simple Architecture of Dynamic Latched Comparator circuit Once the... | Download Scientific Diagram
ATX7006: Dynamic parameter calculations of AD and DA converters
Electronics | Free Full-Text | A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing